| CASE OUTLINE SOURCE AND DESIGNATOR | C-4 MIL-M-38510 |
| DESIGN FUNCTION AND QUANTITY | 9 LATCH, ADDRESSABLE |
| INCLOSURE CONFIGURATION | LEADED CHIP CARRIER |
| INCLOSURE MATERIAL | CERAMIC |
| MAXIMUM POWER DISSIPATION RATING | 500.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | 8-BIT NONINVERTING BUS INTERFACE LATCH |
| SPECIFICATION/STANDARD DATA | 67268-5962-88675/TX/ GOVERNMENT STANDARD |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 28 PRINTED CIRCUIT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM ABSOLUTE INPUT AND 6.0 VOLTS MAXIMUM ABSOLUTE INPUT |